// open roles
BUILD THE CLOCK.
We are a small team solving a hard problem in sovereign timing and autonomous navigation. If you think in photons or nanoseconds, read on.
[ MISSION ]
Take our silicon-nitride optical-clock chip from validated design through MPW tape-out, bring-up, and packaging — and own the photonics that make an integrated optical frequency reference work.
[ WHAT YOU WILL DO ]
- Own PIC design and layout for our SiN platform (ring resonators, couplers, tapers, comb/reference structures) using gdsfactory or equivalent.
- Drive MPW tape-outs: DRC/LVS, PDK mapping, sweep reticles, foundry interaction (US SiN foundries + fallback).
- Model and validate: dispersion engineering, Q optimisation, mode analysis, thermal and light-shift behaviour.
- Own chip bring-up and characterisation: coupling, loss, resonance mapping, comb generation, locking.
- Work packaging: fibre/facet coupling, glass interposer, radiation-shield concepts.
[ MUST HAVE ]
- Deep integrated-photonics fundamentals: waveguides, resonators, coupling, dispersion, loss mechanisms.
- Hands-on PIC design/layout (gdsfactory, KLayout, Lumerical/Tidy3D/MEEP, or similar).
- Real evidence you have designed, taped out, or characterised a photonic chip — coursework alone is not enough.
- Obsession with the domain: you read the papers, you have opinions on microcombs and optical clocks.
[ NICE TO HAVE ]
- Atomic physics / optical frequency references / frequency combs.
- Foundry MPW experience; RF/electro-optics; cryo or space-qualification exposure.
[ MISSION ]
Build the electronics and systems around the clock — starting with the GPSDO timing demonstrator, through board bring-up, disciplining firmware, and a flight-representative payload.
[ WHAT YOU WILL DO ]
- Own timing-board design and bring-up: OCXO disciplining loops, GNSS front-end, power integrity, EFC/DAC, phase-noise measurement.
- Take DRC-clean boards to working hardware: assembly oversight, firmware flash, closed-loop validation, holdover characterisation.
- Build toward a space-representative payload: environmental testing, high-altitude balloon test, hosted-payload interfaces.
- Own the bench: signal integrity, RF, and precise-timing measurement.
[ MUST HAVE ]
- Strong mixed-signal/RF PCB design and bring-up (schematic, layout, debug on the bench).
- Embedded firmware for control loops (C/C++, MCU, DAC/ADC, servo loops).
- Real hardware you have shipped or brought up — a portfolio of working boards.
- Bias to action: you would rather have a working board this month than a perfect one next year.
[ NICE TO HAVE ]
- Precise timing / GPSDO / OCXO / atomic-clock electronics.
- CubeSat / space payload, environmental test, or launch experience.
- FPGA, low-noise analog, or phase-noise metrology.
// apply
INTERESTED?
Send us what you have built. We read everything — no recruiter filter, no form letters.